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天津滨海集成电路设计服务中心将于2012年9月18日至20日举办Cadence公司设计软件“Virtuoso Analog Design Environment v IC6.1.5”培训课程，以帮助IC工程师进一步多方面系统地理解IC设计概念与方法和EDA工具的应用。培训将采用Cadence公司相关领域的培训教材，并由Cadence公司经验丰富工程师主讲，培训方式以讲课和实验穿插进行。
请尽快将培训申请表回复给我，以便安排培训，谢谢！
Virtuoso Analog Design Environment v IC6.1.5
培训通知
天津滨海集成电路设计服务中心将于2012年9月18日-20日举办Cadence公司设计软件“Virtuoso Analog Design Environment v IC6.1.5”培训课程，以帮助IC工程师进一步全面系统地理解IC设计概念与方法和EDA工具的应用。培训将采用Cadence公司相关领域的培训教材，并由Cadence公司资深工程师主讲，培训方式以讲课和实验穿插进行。
Course Description
In this course, you use the Virtuoso® Analog Design Environment L software to set up and control analog and mixed-signal simulations. You run analog simulations using the Spectre® simulator. You also explore the Spectre Turbo and UltraSim simulators. You explore and run simulations with the Virtuoso Accelerated Parallel Simulator (APS). You display and analyze simulation results in the new Virtuoso Visualization and Analysis XL waveform display tool that is introduced in the IC 6.1.5 release. You run specialized simulations, including device checking and DC match. You use Virtuoso options to run electromigration and IR-drop analysis. You apply the OCEAN scripting language to run simulations in batch mode.
Learning Objectives
After completing this course, you will be able to:
o Simulate circuits with the Virtuoso Spectre Circuit simulator, Spectre Turbo, UltraSim full-chip simulator and the Virtuoso Accelerated Parallel Simulator
o Analyze simulation results with the Virtuoso Visualization and Analysis XL waveform display tool
o Modify output waveforms using the calculator and available assistants and workspaces.
o Use the Direct Plot utility
o Use dependent expressions to create and set outputs
o Run parametric and stability analyses
o Use the Component Description Format (CDF) to modify component parameters
o Use the Hierarchy Editor to create design configurations
o Use macromodels, subcircuits, and inline subcircuits in your design
o Determine IR-drop and electromigration issues in a design layout
o Use the Open Command Environment for Analysis (OCEAN) scripting language to run batch simulations
Software Used in This Course
o Virtuoso Analog Design Environment L
o Virtuoso Spectre Circuit Simulator
o Virtuoso UltraSim Simulator L
Software Release(s)
o IC 6.1.5, MMSIM 10.1
Course Agenda
Note that this course can be tailored to better meet your needs – contact the Cadence training staff for specifics.
Day 1
o Getting Started
o Introduction to Virtuoso Analog Design Environment L
o Analog Simulation Details
o Displaying Simulation Results
Day 2
o Analyzing Simulation Results
o Exploring Design Limits
o Component Description Format (CDF)
o Macromodels, Subcircuits, and Inline Subcircuits
Day 3
o Using the Hierarchy Editor
o IR-Drop and Electromigration Analyses
o Using SKILL and the OCEAN Scripting Language
Audience
o Analog Designers
o Analog/Mixed-Signal IC Designers
o Custom Circuit Designers
Prerequisites
You must have experience with or already have knowledge of the following:
o UNIX or Linux OS
You must have experience with the following software:
o Virtuoso® Schematic Editor
培训日期：2012年9月18日-2012年9月20日(食宿自理)
上课时间：上午9：30-12：00 下午1：00-4：30
名额限制：16人
地点：天津开发区第四大街80号天大科技园A1座2楼
联系人：赵先生
电话：59856076
传真：（+8622）59856068
E-mail：zhaozh@innovateda.org
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